ExHET 2024
The 3rd International Workshop on Extreme Heterogeneity Solutions
to be held in conjunction with
PPoPP 2024
02 March, 2024
Edinburgh, UK
Introduction
While computing technologies have remained relatively stable for nearly two decades, new architectural features, such as specialized hardware, heterogeneous cores, deep memory hierarchies, and near-memory processing, have emerged as possible solutions to address the concerns of energy-efficiency, manufacturability, and cost. However, we expect this ‘golden age’ of architectural change to lead to extreme heterogeneity and it will have a major impact on software systems and applications. In this upcoming exascale and extreme heterogeneity era, it will be critical to explore new software approaches that will enable us to effectively exploit this diverse hardware to advance science, the next-generation systems with heterogeneous elements will need to accommodate complex workflows. This is mainly due to the many forms of heterogeneous accelerators (no longer just GPU accelerators) in this heterogeneous era, and the need of mapping different parts of an application onto elements most appropriate for that application component.
Objectives, scope and topics of the workshop
The goal of this workshop is to provide a forum to discuss new and emerging solutions to address these important challenges from the upcoming extreme heterogeneity era. Papers are being sought on many aspects of heterogeneous computing including (but not limited to):
- Heterogeneous Programming Environments and Runtime Systems
- Programming models and systems
- Parallel resource management on heterogeneous systems
- Automated parallelization and compiler techniques (Autotuning)
- Heterogeneous Solutions for HPC and Scientific Applications
- Parallel and distributed algorithms
- Parallel libraries and frameworks
- Parallel processing on heterogeneous systems
- Heterogeneous (included Non-von Neuman) Architectures
- Power/energy management
- Heterogeneous architectures for emerging application domains
- Architecture designs including Non-von Neuman architectures, memory and interconnection
- Reliability/Benchmarking/Measurements
- Debugging, performance tools and techniques
- Fault tolerance and resilience
- Application/hardware benchmarks
Program
TBD
2024 Best Paper Award
TBD
Important Dates
Paper submission deadline : December 29, 2023
Notification of acceptance : January 12, 2024
Camera-ready papers due : February 26, 2024
Workshop day: TBD
Steering Committee
Jeffrey S. Vetter, Oak Ridge National Laboratory, USA
Olivier Aumage, INRIA, France
Manuel Prieto, University Complutense of Madrid, Spain
Hartwig Anzt, KIT, Germany
Stanimire Tomov, University of Tennessee at Knoxville, USA
Antonio J. Pena, Barcelona Supercomputing Center, Spain, Spain
Organizers (Contact us)
Pedro Valero-Lara (co-chair)
Oak Ridge National Laboratory, USA
valerolarap@ornl.gov
Seyong Lee (co-chair)
Oak Ridge National Laboratory, USA
lees2@ornl.gov
Gokcen Kestor (co-chair)
Pacific Northwest National Laboratory, University of California Merced, USA
gokcen.kestor@pnnl.gov
Monil Mohammad Alaul Haque (proceeding chair)
Oak Ridge National Laboratory, USA
monilm@ornl.gov
Jose Manuel Monsalve Diaz (publicity chair)
Argonne National Laboratory, USA
jmonsalvediz@anl.gov
Simon Garcia de Gonzalo (web chair)
Sandia National Laboratory, USA
simgarc@sandia.gov
Programme Committee
- William F. Godoy, Oak Ridge National Laboratory, USA
- Guray Ozen, Google, USA
- Juan Gomez-Luna, ETH Zurich, Switzerland
- Jaewoong Sim, Seoul National University, Korea
- Ali Akoglu, Arizona State University, USA
- Naoya Maruyama, NVIDIA, USA
- Jose Manuel Monsalve, Argonne National Laboratory, USA
- Monil Mohammad Alaul Haque, Oak Ridge National Laboratory, USA
- Het Mankad, Carnegie Mellon University, USA
- Simon Garcia de Gonzalo, Sandia National Laboratory, USA
- Marc Gonzalez-Tallada, Universitat Politecnica de Catalunya, Spain
Manuscript submission
Papers reporting original and unpublished research results and experience are solicited. Papers must not exceed 6 pages in standard ACM two-column conference format. ACM templates for Microsoft Word, and LaTeX are available here. All paper submissions will be handled electronically via EasyChair.
Proceedings
All accepted papers will be published in the ExHET-PPoPP Workshops 2024 proceedings by the ACM Digital Library.
Best Paper Award
The Best Paper Award will be selected on the basis of explicit recommendations of the reviewers and their scoring towards the paper’s originality and quality.
Special Issue Journal
Selected best papers of ExHET will be considered for publication in a special issue of the international journal Applied Sciences (IF: 2.838).
Keynote (Nick Brown, University of Edinburgh):
Domain-specific abstractions: A panacea or false promise for programming extreme heterogeneous architectures
There is a saying that it's called hardware because developing it is hard. However, in recent years there has been a Cambrian explosion in novel hardware architectures that one can use to undertake their calculations and the major blocker is now in fact on the software side. HPC developers must be able to effectively exploit such a diverse mix of hardware without significant architecture-specific expertise and extensively modifying their code for each technology. This is something that we are currently unable to provide but it is critical that we solve the issue, not least because such a heterogeneous mix can often deliver very significant energy advantages. In this talk, I will discuss our efforts to leverage knowledge of the programmer's intentions via domain-specific abstractions during compilation using MLIR. In our approach, computational patterns are identified and then drive the compilation process which enables a single, unmodified, source code to target a wide variety of architectures including GPUs, FPGAs, CGRAs, and the CS-2. By building upon the MLIR infrastructure we are able to often deliver a step change in performance and productivity compared to the current state of the art.
Dr Nick Brown is a Senior Research Fellow at EPCC, University of Edinburgh with research interests in novel hardware architectures and how we empower HPC developers to leverage these most effectively without extensive architecture-specific knowledge. Much of his research has focussed on developing algorithmic techniques to enable the optimization of HPC codes on architectures such as FPGAs and RISC-V, and he runs testbeds as part of the ExCALIBUR exascale program which provides access to these for developers to experiment with their workloads on. He is also the knowledge exchange coordinator for the xDSL project which aims to develop a common DSL compiler ecosystem based on LLVM and MLIR. He has developed numerous production HPC simulation codes in the past, including the Met Office's high-resolution atmospheric model called MONC.
Panel:
Challenges and Solutions for the upcoming Extreme Heterogeneity EraDuring the panel discussion, the panelists as well as those participants in the workshop, will have the opportunity to discuss the fundamentals of extreme heterogeneity: challenges and solutions.
Panelists:Nick Brown, University of Edinburgh, UK
TBD
Registration
Information about registration at PPoPP 2024 website.