ExHET 2026

The 5th International Workshop on Extreme Heterogeneity Solutions

to be held in conjunction with
SCA/HPC Asia 2026

26-29 January, 2026
Osaka, Japan

Introduction

While computing technologies have remained relatively stable for nearly two decades, new architectural features, such as specialized hardware, heterogeneous cores, deep memory hierarchies, and near-memory processing, have emerged as possible solutions to address the concerns of energy efficiency, manufacturability, and cost. However, we expect this ‘golden age’ of architectural change to lead to extreme heterogeneity and will have a major impact on software systems and applications. In this upcoming exascale and extreme heterogeneity era, it will be critical to explore new software approaches that will enable us to effectively exploit this diverse hardware to advance science, the next-generation systems with heterogeneous elements will need to accommodate complex workflows. This is mainly due to the many forms of heterogeneous accelerators (no longer just GPU accelerators) in this heterogeneous era, and the need to map different parts of an application onto elements most appropriate for that application component. In addition, this year we acknowledge the increasing need for Co-Design. This topic will explore the methodologies, challenges, and opportunities in the co-design of hardware, software, and applications to achieve optimal performance, power efficiency, and productivity in the era of extreme heterogeneity.

Objectives, scope and topics of the workshop

This workshop aims to provide a forum to discuss new and emerging solutions to address these important challenges from the upcoming extreme heterogeneity era. Papers are being sought on many aspects of heterogeneous computing including (but not limited to):

• Heterogeneous Programming Environments and Runtime Systems
• Programming models and systems
• Parallel resource management on heterogeneous systems
• Automated parallelization and compiler techniques (Autotuning)
• Programming solutions using AI code generation
• Heterogeneous Solutions for HPC and Scientific Applications
• Parallel and distributed algorithms
• Parallel libraries and frameworks
• Parallel processing on heterogeneous systems
• Heterogeneous (included Non-von Neuman) Architectures
• Power/energy management
• Heterogeneous architectures for emerging application domains
• Architecture designs including Non-von Neuman architectures, memory and interconnection
• Reliability/Benchmarking/Measurements
• Debugging, performance tools and techniques
• Fault tolerance and resilience
• Application/hardware benchmarks
• Co-Design Methodologies and Frameworks
• Strategies for simultaneous development and optimization of hardware and software
• Agile and iterative co-design processes for rapid prototyping and evaluation
• Synergistic design of hardware and system software for von Neumann and non-von Neumann architectures.

Program

TBD

Important Dates

Paper submission deadline : November 7th
Notification of acceptance : Nov 28th
Camera-ready papers due : December 12
Workshop day: January 26th 2026

Steering Committee

Antonio J. Pena, Barcelona Supercomputing Center, Spain

Hartwig Anzt, Technical University of Munich, Germany

Jeffrey S. Vetter, Oak Ridge National Laboratory, USA

Olivier Aumage, INRIA, France

Sunita Chandrasekaran, University of Delaware, USA

Toshiyuki Imamura, RIKEN, Japan

Organizers (Contact us)

Monil Mohammad Alaul Haque (General Co-Chair)
Oak Ridge National Laboratory, USA
monilm@ornl.gov

Simon Garcia de Gonzalo (General Co-Chair)
Sandia National Laboratory, USA
simgarc@sandia.gov

Norihisa Fujita (Program Chair)
Center for Computational Science, University of Tsukuba, Japan
fujita@ccs.tsukuba.ac.jp

Programme Committee

• Ariful Azad, Texas A&M University, USA
• Ali Akoglu, Arizona State University, USA
• Patrick Carribault, CEA, France
• William F. Godoy, Oak Ridge National Laboratory, USA
• Marc Gonzalez-Tallada, Universitat Politècnica de Catalunya, Spain
• Nikela Papadopoulou, University of Glasgow, UK
• Swaroop Pophale, Oak Ridge National Laboratory, USA
• Het Mankad, Oak Ridge National Laboratory, USA
• Takaaki Miyajima, Meiji University, Japan
• Tetsuya Odajima, Fujitsu Limited, Japan
• Ryuichi Sakamoto, Institute of Science Tokyo, Japan
• Aaron Young, Oak Ridge National Laboratory, USA

Manuscript submission

We invite submissions of original, unpublished research and experiential papers. Full papers should be between 12 to 18 pages in length, formatted according to the standard ACM single-column conference format, including figures, tables, and references. Additionally, we are introducing a short paper track for submissions up to 8 to 9 pages. ACM templates for both Microsoft Word and LaTeX can be accessed here. All paper submissions will be managed electronically via linklings.

Proceedings

SCA/HPCAsia 2026 plans to provide an electronic proceedings publication for accepted workshop papers. In past years, SCA/HPCAsia workshop papers have been published in ACM-affiliated proceedings.

Best Paper Award

The Best Full and Short Paper Award will be selected on the basis of explicit recommendations of the reviewers and their scoring towards the paper’s originality and quality.

Special Issue Journal

TBD

Keynote (Taisuke Boku, Center for Computational Sciences, University of Tsukuba):

Extreme Heterogeneity on HPC/AI - What is the next stage?

Heterogeneous supercomputing is the common methodology for advanced HPC/AI processing especially to respond ultra-high demand of computing performance within limited power limitation. GPU is the most commonly used device which enables very high degree of instruction level parallelism with a huge number of SIMD cores and wide memory bandwidth supported by HBM technology. Moreover, the latest GPUs are equipped with high computation capability on dense/sparse matrix with low precision which is suitable for advanced AI processing such as machine learning or LLM. Even on HPC algorithms, such a feature is also applied instead of brute-force FP64 computation by hardware. Another complexity of GPU computing is the combination of GPU and CPU which have been in a discrete platform connected by traditional PCIe bus and are now combined in a single module as like as NVIDIA GH200 or AMD MI300A. This technology opens a new era of GPU computing based on hardware support for shared address space on memories of multiple devices. However, the method to realize this feature depends on the vendors, and the performance optimization is not in a simple manner. The performance portability on multi-vendor devices is also a big challenge. It implies the other accelerators such as FPGA. In this talk, I summarize current technology on accelerated and heterogeneous computing represented with GPU devices and other ones, the characteristics of hybrid GPU/CPU modules with multiple vendors, how to program them, and what is the next challenge of new generation of heterogeneous computing. In the talk, I will also mention on Japan's next generation national flagship supercomputer and its supporting organizations.

Taisuke Boku has been researching HPC system architecture, system software, and performance tuning and evaluation on various scientific applications. From 2019 to 2024, he was the Director for Center for Computational Sciences, University of Tsukuba, a co-designing center with both application researchers and HPC system researchers. He played a central roles for development of original supercomputers in the center including CP-PACS (ranked as number one in TOP500 in 1996), FIRST, PACS-CS, HA-PACS, Cygnus and Pegasus systems, the representative supercomputers in Japan. He was the President of HPCI (High Performance Computing Infrastructure) Consortium in Japan in 2020-2022, and also currently the Vice President in 2024-2026. He was a member of system architecture working group of Fugaku supercomputer development. He received ACM Gordon Bell Prize in 2011. He has been one of the Program Directors of the Feasibility Study of the Next Generation Supercomputer in Japan (ÅgPost-FugakuÅh) under MEXT which was completed on March 2025, and also one of the Program Directors of the Program for Promoting Research on the Supercomputer Fugaku.

Panel:

Challenges and Solutions for the upcoming Extreme Heterogeneity Era

During the panel discussion, the panelists and those participants in the workshop will have the opportunity to discuss the fundamentals of extreme heterogeneity: challenges and solutions.

Panelists:

TBA

Registration

Information about registration at SCA/HPC Asia 2026 website.